1. Field of the Invention
The present invention relates to in-circuit emulation and, in particular, to a technique for providing a microprocessor's program counter value external to the device on a dedicated bus so that an emulator can readily generate a list of executed instruction addresses by monitoring this bus.
2. Discussion of the Prior Art
A microprocessor is useful only if it is possible for systems designers incorporating the microprocessor to "debug" their systems. One particular challenge of developing a microprocessor system design is to identify "bugs" that arise only rarely or only at full frequency operation.
Microprocessor system designers rely on so-called in-circuit emulation techniques to monitor a working system and trace information relating to the ongoing operation of the system to diagnose bugs. One of the most important elements of information to be traced is the value contained in the microprocessor's program counter register.
A microprocessor's program counter register contains the address of the instruction that is presently being executed by the microprocessor. Therefore, by tracing the address value contained in the program counter register, the sequence of instruction execution in the program operating the system can be monitored.
The conventional approach to tracing program execution has been a three step process. First, traffic on the system bus is monitored to trace instruction and data transfers between the system's processing unit and remote main memory. Second, instruction read references are extracted from the bus traffic. Third, the probable sequence of instruction execution is reconstructed based on the extracted instruction read references.
There are several underlying assumptions associated with this conventional approach. One assumption is that the latency between reading an instruction from the system bus and executing the instruction is not significant. This assumption is necessary because there is normally no method of determining when a particular instruction begins execution. A second assumption is that all instruction and data transfers to the processing unit are observable on the system bus. This assumption permits the extraction of instruction read references from the bus and the reconstruction of instruction execution utilizing a software disassembler.
Problems with the conventional approach to in-circuit emulation occur when instruction read references are not observable on the system bus. This can occur either because the microprocessor has a large instruction prefetch queue which, based on the occurrence of exceptions or other anomalies, may not represent the true sequence of instruction execution, or because it includes a local instruction cache so that instruction read references may be serviced by the cache and not appear on the system bus. An instruction cache can normally be disabled at the cost of running the microprocessor at reduced performance. A prefetch queue, however, is an integral part of the processor and cannot be disabled or bypassed.
The prior art technique for solving this problem is to design an external discrete implementation of portions of the particular microprocessor to be emulated. This permits instruction address reconstruction from system bus traffic and from key signals provided by discrete hardware in the emulator.
An additional emulation problem has been correlating the trace listing of executed instructions with a program listing, since the program listing consists of virtual addresses, while the trace listing consists of physical addresses. The difference is due to address translation at run time performed by a memory management unit. The processing unit's integrated memory management unit translates the virtual addresses generated by the executing program to the physical addresses used to access main memory via the system bus. In some circumstances, this translation will not be 1:1; that is, more than one virtual address can be translated to a single physical address. In such cases, it is impossible to determine the virtual addresses of memory references for an executing program by merely observing the physical addresses of the instruction read references on the system bus. Thus, the task of translating addresses from physical back to virtual is not normally possible because of insufficient information available to the emulator. When this translation is important, an external MMU-like device must be built with discrete or custom hardware to provide this functionality in the emulator.